| commit | 699b477a0d3a5bc68034a1520a4337ea0a20f63b | [log] [tgz] |
|---|---|---|
| author | Thierry Reding <treding@nvidia.com> | Mon Mar 23 10:52:45 2015 +0100 |
| committer | Thierry Reding <treding@nvidia.com> | Fri Apr 10 16:04:20 2015 +0200 |
| tree | cbd74f6791b022d63f8b556b042afde65f006d18 | |
| parent | 5e43e259171e1eee8bc074d9c44be434e685087b [diff] |
clk: tegra: Add peripheral registers for bank Y Tegra210 has an extra bank of peripheral clock registers. Add it to the generic peripheral clock code. Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Thierry Reding <treding@nvidia.com>