tree f9edcea8a2a44972acc3831d7eb1180da239e70b
parent adbdce77ccc345e6ae86f6887212af13983a626e
author Paul Burton <paul.burton@imgtec.com> 1432480282 +0100
committer Ralf Baechle <ralf@linux-mips.org> 1434916379 +0200

MIPS: JZ4740: parse SoC interrupt controller parent IRQ from DT

Rather than hardcoding the IRQ number used to cascade interrupts from
the SoC interrupt controller to the CPU interrupt controller, read that
IRQ number from the DT describing the system.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Brian Norris <computersforpeace@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/10137/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>