[ARM] 3352/1: DSB required for the completion of a TLB maintenance operation
Patch from Catalin Marinas
Chapter B2.7.3 in the latest ARM ARM (with v6 information) states that
the completion of a TLB maintenance operation is only guaranteed by
the execution of a DSB (Data Syncronization Barrier, formerly Data
Write Barrier or Drain Write Buffer).
Note that a DSB is only needed in the flush_tlb_kernel_* functions
since the completion is guaranteed by a mode change (i.e. switching
back to user mode) for the flush_tlb_user_* functions.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 15dc1a0..9f80fa5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -78,7 +78,7 @@
choice
prompt "ARM system type"
- default ARCH_RPC
+ default ARCH_VERSATILE
config ARCH_CLPS7500
bool "Cirrus-CL-PS7500FE"