| commit | 6adb8f388ef2f23d4a81e1e42d15f22d62749a06 | [log] [tgz] |
|---|---|---|
| author | Paul Walmsley <paul@pwsan.com> | Fri Jun 19 19:08:24 2009 -0600 |
| committer | paul <paul@twilight.(none)> | Fri Jun 19 19:09:30 2009 -0600 |
| tree | 217206b7b4751b6644e3cbe91cfff8e4df861e48 | |
| parent | cd07ecc828486e5887113c7dc4d9f9022145811b [diff] |
OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize The original CDP kernel that this code comes from waited for 0x800 loops after switching the CORE DPLL M2 divider. This does not appear to be necessary. Signed-off-by: Paul Walmsley <paul@pwsan.com>