| commit | 6b42e8d03bef975085c0397806d00fbd1df67eb8 | [log] [tgz] |
|---|---|---|
| author | Felix Fietkau <nbd@openwrt.org> | Mon Apr 26 15:04:35 2010 -0400 |
| committer | John W. Linville <linville@tuxdriver.com> | Tue Apr 27 16:09:18 2010 -0400 |
| tree | 42ddfa6f922ad677ee55355822c555de2a11cb10 | |
| parent | 5b75d0fca5b8cd2657fb240f2112e272a115b2f9 [diff] |
ath9k_hw: fix fast clock handling for 5GHz channels Combine multiple checks that were supposed to check for the same conditions, but didn't. Always enable fast PLL clock on AR9280 2.0 Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>