| commit | e39bf98a91abd5c8fb290f139521dddc3db3c37d | [log] [tgz] |
|---|---|---|
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | Sat Nov 02 21:07:36 2013 -0700 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Fri Nov 08 18:09:54 2013 +0100 |
| tree | 71f046ac641f15105461180bc86d49ca5cbcf0c7 | |
| parent | 756f85cffef2bc84aa85b25031c1c97721928bd2 [diff] |
drm/i915/bdw: get the correct LCPLL frequency on Broadwell v2: Rebased onto Paulo's MHz->kHz change. v3: Rebased on top of the Haswell pc8+ adjustements. v4: Use the exact 337.5MHz clock, should have been done as part of v2. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>