microblaze: Fix coding style issues
Fix coding style issues reported by checkpatch.pl.
Signed-off-by: Michal Simek <monstr@monstr.eu>
diff --git a/arch/microblaze/pci/xilinx_pci.c b/arch/microblaze/pci/xilinx_pci.c
index 0687a42..14c7da5f 100644
--- a/arch/microblaze/pci/xilinx_pci.c
+++ b/arch/microblaze/pci/xilinx_pci.c
@@ -18,7 +18,7 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/pci.h>
-#include <asm/io.h>
+#include <linux/io.h>
#define XPLB_PCI_ADDR 0x10c
#define XPLB_PCI_DATA 0x110
@@ -82,7 +82,7 @@
*
* List pci devices in very early phase.
*/
-void __init xilinx_early_pci_scan(struct pci_controller *hose)
+static void __init xilinx_early_pci_scan(struct pci_controller *hose)
{
u32 bus = 0;
u32 val, dev, func, offset;
@@ -91,27 +91,27 @@
for (dev = 0; dev < 2; dev++) {
/* List only first function number - up-to 8 functions */
for (func = 0; func < 1; func++) {
- printk(KERN_INFO "%02x:%02x:%02x", bus, dev, func);
+ pr_info("%02x:%02x:%02x", bus, dev, func);
/* read the first 64 standardized bytes */
/* Up-to 192 bytes can be list of capabilities */
for (offset = 0; offset < 64; offset += 4) {
early_read_config_dword(hose, bus,
PCI_DEVFN(dev, func), offset, &val);
if (offset == 0 && val == 0xFFFFFFFF) {
- printk(KERN_CONT "\nABSENT");
+ pr_cont("\nABSENT");
break;
}
if (!(offset % 0x10))
- printk(KERN_CONT "\n%04x: ", offset);
+ pr_cont("\n%04x: ", offset);
- printk(KERN_CONT "%08x ", val);
+ pr_cont("%08x ", val);
}
- printk(KERN_INFO "\n");
+ pr_info("\n");
}
}
}
#else
-void __init xilinx_early_pci_scan(struct pci_controller *hose)
+static void __init xilinx_early_pci_scan(struct pci_controller *hose)
{
}
#endif