| commit | 6bf7bd6967b1cdde1fe953b0edb951966799fb44 | [log] [tgz] |
|---|---|---|
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | Wed Nov 02 14:11:35 2005 +0000 |
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | Wed Nov 02 14:11:35 2005 +0000 |
| tree | 4b2537d200a51e13ea9e2b439c58411f7769f325 | |
| parent | bfca94590bfd3dcd958c542d2fb6406518150fee [diff] |
[ARM] Fix mm initialisation with write buffered write allocate caches It seems that without the extra tlb flush, we may end up faulting during the early kernel initialisation because the TLB can't see the updated page tables. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>