commit | cd4f9e547850a7e35e552210bfea9a3050b55733 | [log] [tgz] |
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author | Chris Lew <clew@codeaurora.org> | Wed May 24 16:16:38 2017 -0700 |
committer | Chris Lew <clew@codeaurora.org> | Tue Sep 05 17:23:23 2017 -0700 |
tree | 89795adf81679e4f924d7b8bdaeaa55f3d1ef071 | |
parent | bafb98e9dae261a50adc0151a14c0590f3d12693 [diff] |
soc: qcom: glink_spi_xprt: Remove extra SPI transactions The TX FIFO write reg and the RX FIFO read reg are controlled by this processor. Keep track of the state of these two indexes to reduce the amount of SPI reads. CRs-Fixed: 2093123 Change-Id: I4ffa0e08bce6dabd57f33a13fef8107211ce3f09 Signed-off-by: Chris Lew <clew@codeaurora.org>