tree 14a62fe743a92c4df4ea25d5b1bdbe90cd3e70b1
parent 4664d4d86012c4a51b9f40d0d72e27e39205e874
author Santosh Shilimkar <santosh.shilimkar@ti.com> 1334230312 +0530
committer Nishanth Menon <nm@ti.com> 1410194321 -0500

ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomains

In addition to the standard power-management technique, the OMAP5 / DRA7
MPU subsystem also employs an SR3-APG (mercury) power management
technology to reduce leakage.

It allows for full logic and memories retention on MPU_C0 and MPU_C1 and
is controlled by the PRCM_MPU. Only "Fast-mode" is supported on the
OMAP5 and DRA7 family of processors.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[nm@ti.com: minor consolidation]
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>