tree 11d53df8337ba1f498dcfb4d08a10c41d5e638ed
parent e13c42ecbe580509451e021ba2586871e5b47640
author Vineet Gupta <vgupta@synopsys.com> 1438606676 +0530
committer Vineet Gupta <vgupta@synopsys.com> 1438660590 +0530

ARCv2: [axs103_smp] Reduce clk for Quad FPGA configs

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>