tree ab1629de17f4d8763343b6d53ee58a674bb7d2e4
parent ffb273623bc506d854902a415ef241b79232f93a
author Bruce Allan <bruce.w.allan@intel.com> 1273096806 +0000
committer David S. Miller <davem@davemloft.net> 1273134688 -0700

e1000e: reset MAC-PHY interconnect on 82577/82578 during Sx->S0

During Sx->S0 transitions, the interconnect between the MAC and PHY on
82577/82578 can remain in SMBus mode instead of transitioning to the
PCIe-like mode required during normal operation.  Toggling the LANPHYPC
Value bit essentially resets the interconnect forcing it to the correct
mode.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>