ARM: tegra: select correct parent clk for pll_p
For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of
pll_ref in the tegra30_clk_init_table and this is resulting in a
boot-time warning. This patch fixes this by correcting the clk init
table.
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 0b0a5f5..988549a 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -102,7 +102,7 @@
static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
/* name parent rate enabled */
{ "clk_m", NULL, 0, true },
- { "pll_p", "clk_m", 408000000, true },
+ { "pll_p", "pll_ref", 408000000, true },
{ "pll_p_out1", "pll_p", 9600000, true },
{ NULL, NULL, 0, 0},
};