ARM: dts: msm: Enable display on sdxpoorwills CDP
Enabling QPIC display on CDP by adding the display
construct to CDP dtsi.
Change-Id: I2b15a0bc9c97c4e9f36851ec10b1d7e053fa9683
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
diff --git a/arch/arm/boot/dts/qcom/qpic-panel-ili-hvga.dtsi b/arch/arm/boot/dts/qcom/qpic-panel-ili-hvga.dtsi
new file mode 100644
index 0000000..e06f398
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/qpic-panel-ili-hvga.dtsi
@@ -0,0 +1,21 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+ qcom,mdss_lcdc_ili_hvga {
+ compatible = "qcom,mdss-qpic-panel";
+ label = "ili9488 hvga lcdc panel";
+ qcom,mdss-pan-res = <320 480>;
+ qcom,mdss-pan-bpp = <18>;
+ qcom,refresh_rate = <60>;
+ };
+};
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-cdp.dts b/arch/arm/boot/dts/qcom/sdxpoorwills-cdp.dts
index 3007f5b..99e3faa 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-cdp.dts
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-cdp.dts
@@ -13,6 +13,8 @@
/dts-v1/;
#include "sdxpoorwills-cdp.dtsi"
+#include "sdxpoorwills-display.dtsi"
+#include "qpic-panel-ili-hvga.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXPOORWILLS CDP";
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-display.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills-display.dtsi
new file mode 100644
index 0000000..e63d9d5
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-display.dtsi
@@ -0,0 +1,37 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/ {
+ mdss_qpic: qcom,msm_qpic@7980000 {
+ compatible = "qcom,mdss_qpic";
+ reg = <0x1B00000 0x24000>;
+ reg-names = "qpic_base";
+ interrupts = <0 251 0>;
+
+ qcom,msm-bus,name = "mdss_qpic";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+
+ qcom,msm-bus,vectors-KBps =
+ <91 512 0 0>,
+ /* Voting for max b/w on PNOC bus for now */
+ <91 512 400000 800000>;
+
+ vdd-supply = <&pmxpoorwills_l6>;
+
+ pinctrl-names= "mdss_default", "mdss_sleep";
+ pinctrl-0 = <&mdss_cs_active &mdss_te_active
+ &mdss_rs_active &mdss_ad_active &mdss_bl_active>;
+ pinctrl-1 = <&mdss_cs_sleep &mdss_te_sleep
+ &mdss_rs_sleep &mdss_ad_sleep &mdss_bl_sleep>;
+ };
+};
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi
index e3f49d0..08c6c3b 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi
@@ -1348,6 +1348,138 @@
};
};
+ mdss_cs_active: mdss_cs_active {
+ mux {
+ pins = "gpio21";
+ function = "ebi2_lcd";
+ };
+
+ config {
+ pins = "gpio21";
+ drive-strength = <10>; /* 10 mA */
+ bias-disable; /* NO pull */
+ };
+ };
+
+ mdss_cs_sleep: mdss_cs_sleep {
+ mux {
+ pins = "gpio21";
+ function = "ebi2_lcd";
+ };
+
+ config {
+ pins = "gpio21";
+ drive-strength = <2>; /* 2 mA */
+ bias-disable; /* NO pull */
+ };
+ };
+
+ mdss_te_active: mdss_te_active {
+ mux {
+ pins = "gpio22";
+ function = "ebi2_lcd";
+ };
+
+ config {
+ pins = "gpio22";
+ drive-strength = <10>; /* 10 mA */
+ bias-disable; /* NO pull */
+ };
+ };
+
+ mdss_te_sleep: mdss_te_sleep {
+ mux {
+ pins = "gpio22";
+ function = "ebi2_lcd";
+ };
+
+ config {
+ pins = "gpio22";
+ drive-strength = <2>; /* 2 mA */
+ bias-disable; /* NO pull */
+ };
+ };
+
+ mdss_rs_active: mdss_rs_active {
+ mux {
+ pins = "gpio23";
+ function = "ebi2_lcd";
+ };
+
+ config {
+ pins = "gpio23";
+ drive-strength = <10>; /* 10 mA */
+ bias-disable; /* NO pull */
+ };
+ };
+
+ mdss_rs_sleep: mdss_rs_sleep {
+ mux {
+ pins = "gpio23";
+ function = "ebi2_lcd";
+ };
+
+ config {
+ pins = "gpio23";
+ drive-strength = <2>; /* 2 mA */
+ bias-disable; /* NO pull */
+ };
+ };
+
+ mdss_ad_active: mdss_ad_active {
+ mux {
+ pins = "gpio20";
+ function = "ebi2_a";
+ };
+
+ config {
+ pins = "gpio20";
+ drive-strength = <10>; /* 10 mA */
+ bias-disable; /* NO pull */
+ };
+ };
+
+ mdss_ad_sleep: mdss_ad_sleep {
+ mux {
+ pins = "gpio20";
+ function = "ebi2_a";
+ };
+
+ config {
+ pins = "gpio20";
+ drive-strength = <2>; /* 2 mA */
+ bias-disable; /* NO pull */
+ };
+ };
+
+ mdss_bl_active: mdss_bl_active {
+ mux {
+ pins = "gpio91";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio91";
+ drive-strength = <10>; /* 10 mA */
+ bias-disable; /* NO pull */
+ output-high;
+ };
+ };
+
+ mdss_bl_sleep: mdss_bl_sleep {
+ mux {
+ pins = "gpio91";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio91";
+ drive-strength = <2>; /* 2 mA */
+ bias-disable; /* NO pull */
+ output-low;
+ };
+ };
+
pmx_sec_mi2s_aux_din {
sec_din_sleep: sec_din_sleep {
mux {