tree 5eac56f9dd6a9ebe334a0bbe68d978adde0dc18e
parent 92e963f50fc74041b5e9e744c330dca48e04f08d
author Kedareswara rao Appana <appana.durga.rao@xilinx.com> 1456495431 +0530
committer Vinod Koul <vinod.koul@intel.com> 1457019158 +0530

dmaengine: xilinx_vdma: Improve SG engine handling

The current driver allows user to queue up multiple segments
on to a single transaction descriptor. User will submit this single desc
and in the issue_pending() we decode multiple segments and submit to SG HW engine.
We free up the allocated_desc when it is submitted to the HW.

Existing code prevents the user to prepare multiple trasactions at same time as
we are overwrite with the allocated_desc.

The best utilization of HW SG engine would happen if we collate the pending
list when we start dma this patch updates the same.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>