tree 4bef1cb0c169fd57ff7107773e7a065aefa5512f
parent 63911d7295524e59205ecfa3b2db437544c52eb8
author Ville Syrjälä <ville.syrjala@linux.intel.com> 1463172093 +0300
committer Ville Syrjälä <ville.syrjala@linux.intel.com> 1464027075 +0300

drm/i915: Store cdclk PLL reference clock under dev_priv

Future platforms will have multiple options for the cdclk PLL reference
clock, so let's start tracking that under dev_priv alreday on SKL,
although on SKL it's always 24 MHz.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463172100-24715-15-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>