tree d30c4aee05ca2f8ae85ddc10252c45b9f61cd3b7
parent 49e01e3fb6efe1b0abfa2d5675f88f07989d621f
author Russell King <rmk+kernel@arm.linux.org.uk> 1326673061 +0000
committer Russell King <rmk+kernel@arm.linux.org.uk> 1328801653 +0000

ARM: sa11x0: neponset: fix interrupt setup

Since ARM was converted to genirq, the neponset IRQ implementation has
gradually broken as a result of various subtle changes being introduced
into genirq.

It used to be that simple IRQs did not need an IRQ chip.  This is no
longer the case, and genirq barfs in irq_set_handler().  Fix this by
introducing a dummy no-op chip, and registering it along with the flow
handler.

Neponset IRQs really don't have any masking ability - all we have is a
status register to allow us to decode the source, and a three input OR
gate inside a CPLD.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>