clk: msm: mdss: update the programming of DYNAMIC_REFRESH_PLL_UPPER_ADDR2
As part of dynamic refresh sequence, we program PLL_UPPER_ADDR2 register to
0x003FFE00 instead of 0x001FFE00. This causes a register write to
DSIPHY_PLL_KVCO_COUNT1 to 0x1 during the dynamic refresh operation whereas
the register write is supposed to happen for DSIPHY_CMN_PLL_CNTRL register.
Update the write value to DYNAMIC_REFRESH_PLL_UPPER_ADDR2 to take care
of this.
Change-Id: I991920d5a45e79670a4a033c8a83bef6c7f3136b
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
1 file changed