| commit | 7290cfeb4436e62d74f38af4f733a0a35b09c4cb | [log] [tgz] |
|---|---|---|
| author | Jérémy Lefaure <jeremy.lefaure@lse.epita.fr> | Wed Jun 28 20:57:29 2017 -0400 |
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | Thu Dec 14 09:28:22 2017 +0100 |
| tree | 195423333f789007bf1cbfb5ce03a59774de46f6 | |
| parent | 62c12d671c49e15cd847380b7692e60711f73f09 [diff] |
EDAC, i5000, i5400: Fix definition of NRECMEMB register [ Upstream commit a8c8261425649da58bdf08221570e5335ad33a31 ] In the i5000 and i5400 drivers, the NRECMEMB register is defined as a 16-bit value, which results in wrong shifts in the code, as reported by sparse. In the datasheets ([1], section 3.9.22.20 and [2], section 3.9.22.21), this register is a 32-bit register. A u32 value for the register fixes the wrong shifts warnings and matches the datasheet. Also fix the mask to access to the CAS bits [27:16] in the i5000 driver. [1]: https://www.intel.com/content/dam/doc/datasheet/5000p-5000v-5000z-chipset-memory-controller-hub-datasheet.pdf [2]: https://www.intel.se/content/dam/doc/datasheet/5400-chipset-memory-controller-hub-datasheet.pdf Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/20170629005729.8478-1-jeremy.lefaure@lse.epita.fr Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Sasha Levin <alexander.levin@verizon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>