pasemi_mac: RX/TX ring management cleanup
pasemi_mac: RX/TX ring management cleanup
Prepare a bit for supporting multiple TX queues by cleaning up some
of the ring management and shuffle things around a bit.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
diff --git a/drivers/net/pasemi_mac.h b/drivers/net/pasemi_mac.h
index 60368df..1269015 100644
--- a/drivers/net/pasemi_mac.h
+++ b/drivers/net/pasemi_mac.h
@@ -28,17 +28,20 @@
struct pasemi_mac_txring {
spinlock_t lock;
+ u64 *status; /* Ptr to cacheable status area */
u64 *ring;
dma_addr_t dma;
unsigned int size;
unsigned int next_to_fill;
unsigned int next_to_clean;
struct pasemi_mac_buffer *ring_info;
- char irq_name[10]; /* "eth%d tx" */
+ int chan;
+ struct pasemi_mac *mac; /* Needed in intr handler */
};
struct pasemi_mac_rxring {
spinlock_t lock;
+ u64 *status; /* Ptr to cacheable status area */
u64 *ring; /* RX channel descriptor ring */
dma_addr_t dma;
u64 *buffers; /* RX interface buffer ring */
@@ -47,7 +50,7 @@
unsigned int next_to_fill;
unsigned int next_to_clean;
struct pasemi_mac_buffer *ring_info;
- char irq_name[10]; /* "eth%d rx" */
+ struct pasemi_mac *mac; /* Needed in intr handler */
};
struct pasemi_mac {
@@ -61,16 +64,12 @@
struct phy_device *phydev;
struct napi_struct napi;
- /* Pointer to the cacheable per-channel status registers */
- u64 *rx_status;
- u64 *tx_status;
-
u8 type;
#define MAC_TYPE_GMAC 1
#define MAC_TYPE_XAUI 2
u32 dma_txch;
- u32 dma_if;
u32 dma_rxch;
+ u32 dma_if;
u8 mac_addr[6];
@@ -78,8 +77,10 @@
struct pasemi_mac_txring *tx;
struct pasemi_mac_rxring *rx;
- unsigned long tx_irq;
- unsigned long rx_irq;
+ unsigned int tx_irq;
+ unsigned int rx_irq;
+ char tx_irq_name[10]; /* "eth%d tx" */
+ char rx_irq_name[10]; /* "eth%d rx" */
int link;
int speed;
int duplex;