tree 7480c3c56dd4fdcacaf057c081f3fcbc251d2f46
parent d743ecf360637d489a3ba81a268f574359149601
author Damien Lespiau <damien.lespiau@intel.com> 1360769257 +0000
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1411561934 +0200

drm/i915/skl: Add the Skylake PCI ids

v2: Squash in 2nd patch from Damien for more ids (Daniel)
v3: info->has*ring -> info->ring_mask conversion. Also add VEBOX support.
v4: Fold in update from Damien
v5: Rebase and add GEN_DEFAULT_PIPEOFFSETS
v6: Add more PCI ID (Vandana)
v7: Rebase and add IVB_CURSOR_OFFSETS
v8: Renamed the macro from _PCI_IDS to _IDS for consistency

Reviewed-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>