| /* |
| * This file contains common code that is intended to be used across |
| * boards so that it's not replicated. |
| * |
| * Copyright (C) 2011 Xilinx |
| * |
| * This software is licensed under the terms of the GNU General Public |
| * License version 2, as published by the Free Software Foundation, and |
| * may be copied, distributed, and modified under those terms. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| #include <linux/init.h> |
| #include <linux/kernel.h> |
| #include <linux/cpumask.h> |
| #include <linux/platform_device.h> |
| #include <linux/clk.h> |
| #include <linux/clk/zynq.h> |
| #include <linux/clocksource.h> |
| #include <linux/of_address.h> |
| #include <linux/of_irq.h> |
| #include <linux/of_platform.h> |
| #include <linux/of.h> |
| #include <linux/irqchip.h> |
| |
| #include <asm/mach/arch.h> |
| #include <asm/mach/map.h> |
| #include <asm/mach/time.h> |
| #include <asm/mach-types.h> |
| #include <asm/page.h> |
| #include <asm/pgtable.h> |
| #include <asm/smp_scu.h> |
| #include <asm/hardware/cache-l2x0.h> |
| |
| #include "common.h" |
| |
| void __iomem *zynq_scu_base; |
| |
| static struct of_device_id zynq_of_bus_ids[] __initdata = { |
| { .compatible = "simple-bus", }, |
| {} |
| }; |
| |
| /** |
| * xilinx_init_machine() - System specific initialization, intended to be |
| * called from board specific initialization. |
| */ |
| static void __init xilinx_init_machine(void) |
| { |
| /* |
| * 64KB way size, 8-way associativity, parity disabled |
| */ |
| l2x0_of_init(0x02060000, 0xF0F0FFFF); |
| |
| of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); |
| } |
| |
| static void __init xilinx_zynq_timer_init(void) |
| { |
| struct device_node *np; |
| void __iomem *slcr; |
| |
| np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); |
| slcr = of_iomap(np, 0); |
| WARN_ON(!slcr); |
| |
| xilinx_zynq_clocks_init(slcr); |
| |
| clocksource_of_init(); |
| } |
| |
| static struct map_desc zynq_cortex_a9_scu_map __initdata = { |
| .length = SZ_256, |
| .type = MT_DEVICE, |
| }; |
| |
| static void __init zynq_scu_map_io(void) |
| { |
| unsigned long base; |
| |
| base = scu_a9_get_base(); |
| zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base); |
| /* Expected address is in vmalloc area that's why simple assign here */ |
| zynq_cortex_a9_scu_map.virtual = base; |
| iotable_init(&zynq_cortex_a9_scu_map, 1); |
| zynq_scu_base = (void __iomem *)base; |
| BUG_ON(!zynq_scu_base); |
| } |
| |
| /** |
| * xilinx_map_io() - Create memory mappings needed for early I/O. |
| */ |
| static void __init xilinx_map_io(void) |
| { |
| debug_ll_io_init(); |
| zynq_scu_map_io(); |
| } |
| |
| static const char *xilinx_dt_match[] = { |
| "xlnx,zynq-zc702", |
| "xlnx,zynq-7000", |
| NULL |
| }; |
| |
| MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") |
| .map_io = xilinx_map_io, |
| .init_irq = irqchip_init, |
| .init_machine = xilinx_init_machine, |
| .init_time = xilinx_zynq_timer_init, |
| .dt_compat = xilinx_dt_match, |
| MACHINE_END |