tree 709e8daa51429f280679614510cffa4dd4b8013a
parent f073cd8a3e7b3b7d5f572b8178aa4abe6115e52f
author Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 1456141419 +0000
committer Stephen Boyd <sboyd@codeaurora.org> 1456179353 -0800

clk: qcom: msm8960: fix ce3_core clk enable register

This patch corrects the enable register offset which is actually 0x36cc
instead of 0x36c4

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>