h8300: Rename ctlr_out/in[bwl] to raw_read/write[bwl]
For the sake of consistency, let rename all ctrl_out/in calls to the write/read
calls so we have the same API consistent with the other architectures hence
open the door for the increasing of the test compilation coverage.
The unsigned long coercive cast is removed because all variables are set to
the right type "void __iomem *".
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c
index c1eef42..91bf199 100644
--- a/drivers/clocksource/h8300_tpu.c
+++ b/drivers/clocksource/h8300_tpu.c
@@ -21,8 +21,8 @@
struct tpu_priv {
struct clocksource cs;
- unsigned long mapbase1;
- unsigned long mapbase2;
+ void __iomem *mapbase1;
+ void __iomem *mapbase2;
raw_spinlock_t lock;
unsigned int cs_enabled;
};
@@ -31,8 +31,8 @@
{
unsigned long tcnt;
- tcnt = ctrl_inw(p->mapbase1 + TCNT) << 16;
- tcnt |= ctrl_inw(p->mapbase2 + TCNT);
+ tcnt = readw(p->mapbase1 + TCNT) << 16;
+ tcnt |= readw(p->mapbase2 + TCNT);
return tcnt;
}
@@ -41,7 +41,7 @@
unsigned long v1, v2, v3;
int o1, o2;
- o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
+ o1 = readb(p->mapbase1 + TSR) & 0x10;
/* Make sure the timer value is stable. Stolen from acpi_pm.c */
do {
@@ -49,7 +49,7 @@
v1 = read_tcnt32(p);
v2 = read_tcnt32(p);
v3 = read_tcnt32(p);
- o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
+ o1 = readb(p->mapbase1 + TSR) & 0x10;
} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
@@ -82,10 +82,10 @@
WARN_ON(p->cs_enabled);
- ctrl_outw(0, p->mapbase1 + TCNT);
- ctrl_outw(0, p->mapbase2 + TCNT);
- ctrl_outb(0x0f, p->mapbase1 + TCR);
- ctrl_outb(0x03, p->mapbase2 + TCR);
+ writew(0, p->mapbase1 + TCNT);
+ writew(0, p->mapbase2 + TCNT);
+ writeb(0x0f, p->mapbase1 + TCR);
+ writeb(0x03, p->mapbase2 + TCR);
p->cs_enabled = true;
return 0;
@@ -97,8 +97,8 @@
WARN_ON(!p->cs_enabled);
- ctrl_outb(0, p->mapbase1 + TCR);
- ctrl_outb(0, p->mapbase2 + TCR);
+ writeb(0, p->mapbase1 + TCR);
+ writeb(0, p->mapbase2 + TCR);
p->cs_enabled = false;
}
@@ -139,8 +139,8 @@
goto unmap_L;
}
- tpu_priv.mapbase1 = (unsigned long)base[CH_L];
- tpu_priv.mapbase2 = (unsigned long)base[CH_H];
+ tpu_priv.mapbase1 = base[CH_L];
+ tpu_priv.mapbase2 = base[CH_H];
clocksource_register_hz(&tpu_priv.cs, clk_get_rate(clk) / 64);