| commit | 75c13993db592343bda1fd62f2555fea037d56bd | [log] [tgz] |
|---|---|---|
| author | Daniel Vetter <daniel.vetter@ffwll.ch> | Sat Jan 28 23:48:46 2012 +0100 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Fri Feb 10 17:43:49 2012 +0100 |
| tree | e21d84f7ac42b4173a3b5be45b20355cab995b23 | |
| parent | c3febcc438ba0878b164c74310bd77c50dbb0ba8 [diff] |
drm/i915: fixup overlay checks for interlaced modes The drm core _really_ likes to frob around with the crtc timings and put halfed vertical timings (in fields) in there. Which confuses the overlay code, resulting in it's refusal to display anything at the lower half of an interlaced pipe. Tested-by: Christopher Egert <cme3000@gmail.com> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>