| commit | d2e6d30ad123c81de1d8d6efa2e3e3e33c1e327b | [log] [tgz] |
|---|---|---|
| author | Markos Chandras <markos.chandras@imgtec.com> | Wed Nov 19 09:39:56 2014 +0000 |
| committer | Markos Chandras <markos.chandras@imgtec.com> | Tue Feb 17 15:37:30 2015 +0000 |
| tree | 15eed1fdc2a4845ec601dec5b162b3a77778e12a | |
| parent | 8c56208aff779a9c9086089b23e01b92b74a939a [diff] |
MIPS: mm: page: Add MIPS R6 support The MIPS R6 pref instruction only has 9 bits for the immediate field so skip the micro-assembler PREF instruction if the offset does not fit in 9 bits. Moreover, bit 30 (Pref_PrepareForStore) is no longer valid in MIPS R6, so we change the default for all MIPS R6 processors to bit 5 (Pref_StoreStreamed). Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>