| commit | 7954dfaee386d45d6ec655e5153ad67edf311a56 | [log] [tgz] |
|---|---|---|
| author | Chen-Yu Tsai <wens@csie.org> | Wed Nov 26 15:16:52 2014 +0800 |
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | Sun Dec 21 23:51:37 2014 +0100 |
| tree | c8ebbdba5b2e9d16782133b2e8ca3e0db683a87a | |
| parent | 75bd2ec1a65a30094f630f9c5bf3ecfe9549496f [diff] |
clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider This patch unifies the sun6i AHB1 clock, originally supported with separate mux and divider clks. It also adds support for the pre-divider on the PLL6 input, thus allowing the clock to be muxed to PLL6 with proper clock rate calculation. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>