| commit | 79eee7aa0d4de5a42331c63d3c7c735248b53d0c | [log] [tgz] |
|---|---|---|
| author | Ben Skeggs <bskeggs@redhat.com> | Wed Sep 26 12:43:10 2012 +1000 |
| committer | Ben Skeggs <bskeggs@redhat.com> | Wed Sep 26 12:43:10 2012 +1000 |
| tree | 6c5cd081e1d2181d4f9ef3ac33481e3e049ec80a | |
| parent | c7ead11d0b498984169871fd03c57441862ec3f3 [diff] |
drm/nvc0/ltcg: mask off intr 0x10 NVIDIA do that at startup too on Fermi, so perhaps the heap of 0x10 intrs we receive are normal and we can ignore them. On Kepler NVIDIA *don't* do this, but the hardware appears to come up with the bit masked off by default - so that's probably why :) This should silence some interrupt spam seen on Fermi+ boards. Backported patch from reworked nouveau kernel tree. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>