mmc: core: fix issue with devfreq clock scaling
Due to recent DDR52 lower bus speed mode in clock scaling,
there is a mismatch between the clock frequencies used by
the devfreq framework and the MMC driver. Due to this, SDCC
clock is sometimes running at DDR25 and ICE clock is running
at 100MHz causing the power regression. Fix this mismatch by
initializing the frequencies properly during MMC resume based
on the current ios.clock.
CRs-Fixed: 974940
Change-Id: I09fe888d0fbd1fde3f6a6f32806315ddbb5bf6e1
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
1 file changed