| commit | 7b24c9a696c1c68eaa471a27bf467e97a9986fa9 | [log] [tgz] |
|---|---|---|
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | Mon Sep 14 15:19:59 2015 -0300 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Wed Sep 23 14:39:18 2015 +0200 |
| tree | b71211080b31619a8c95c4c437b641823af8f3f0 | |
| parent | b8bf5d7fe0dee64ed0a73fa1e95ba8e464d605da [diff] |
drm/i915: don't enable FBC when pixel rate exceeds 95% on HSW/BDW BSpec says we shouldn't enable FBC on HSW/BDW when the pipe pixel rate exceeds 95% of the core display clock. v2: - HSW also needs the WA (Ville). - Add the WA name (Ville). - Use the current cdclk (Ville). Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>