tree 1a8750b93a459bcb56a257f4b906c902c89c916d
parent 50fdda702fe5c833a69aa36bbfe878319bbf443d
author Patrice Chotard <patrice.chotard@st.com> 1467105712 +0200
committer Patrice Chotard <patrice.chotard@st.com> 1468221344 +0200

ARM: sti: Implement dummy L2 cache's write_sec

This patch implements the write_sec callback that handle PL310
secure registers writes.
This callback is just a stub for now, to avoid system crash.
Later, it could handle SMC calls so that TZ handles the needed writes.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>