tree b2d1f4299fe07f90576133492228dbeed49a68b5
parent f7bb887fb898307dd575179303b710d933f242ea
author Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> 1466166314 +0100
committer Geert Uytterhoeven <geert+renesas@glider.be> 1466493666 +0200

clk: renesas: r8a7795: Add DRIF clock

This patch adds DRIF module clocks for r8a7795 SoC.

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>