ARM: dts: msm: Set llccbw default gov to performance for sdm845
Currently, DDR isn't properly set to fmax during the boot process. Fix this
by setting the default governor of llccbw to performance.
Change-Id: I5451009231db4c932e6f1cbd6a7931a094c56acd
Signed-off-by: Jonathan Avila <avilaj@codeaurora.org>
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index d85d178..deaa0ea 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -847,7 +847,7 @@
llccbw: qcom,llccbw {
compatible = "qcom,devbw";
- governor = "powersave";
+ governor = "performance";
qcom,src-dst-ports =
<MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>;
qcom,active-only;