tree b0195dbd6f733b19d749e31d1a0b8aba1707a1fa
parent bdc80de2a6dbaa0d08c393b4ba8912a0ad4b047f
author Hai Li <hali@codeaurora.org> 1431709444 -0400
committer Rob Clark <robdclark@gmail.com> 1434042664 -0400

drm/msm/dsi: Add DSI PLL clock driver support

DSI byte clock and pixel clocks are sourced from DSI PLL.
This change adds the DSI PLL source clock driver under
common clock framework.

This change handles DSI 28nm PLL only.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>