tree bc4b28c2e5bdae01a2c8a250176fcdac6ae7a8ce
parent 9308add6ea4fedeba37b0d7c4630a542bd34f214
author Dan Williams <dan.j.williams@intel.com> 1252456973 -0700
committer Dan Williams <dan.j.williams@intel.com> 1252456973 -0700

dmaengine, async_tx: support alignment checks

Some engines have transfer size and address alignment restrictions.  Add
a per-operation alignment property to struct dma_device that the async
routines and dmatest can use to check alignment capabilities.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>