MIPS: Emulate the new MIPS R6 branch compact (BC) instruction
MIPS R6 uses the <R6 LWC2 opcode for the new BC instruction.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index cd880b9..1a0a30e 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -780,6 +780,15 @@
epc += 8;
regs->cp0_epc = epc;
break;
+#else
+ case bc6_op:
+ /* Only valid for MIPS R6 */
+ if (!cpu_has_mips_r6) {
+ ret = -SIGILL;
+ break;
+ }
+ regs->cp0_epc += 8;
+ break;
#endif
}