tree eda9d043db61ae7a1ffd621d2af85cfbf6c3e0f0
parent 741a6c4c59cfa1266bc75aca9f66bdc6e421b0d5
author Linus Walleij <linus.walleij@linaro.org> 1382082307 +0200
committer Linus Walleij <linus.walleij@linaro.org> 1382095521 +0200

ARM: ux500: fix clock for GPIO block 8

The clock assignment in the device tree for GPIO block 8 was
incorrect, indicating this was managed by bit 1 on PRCC 6
while it was in fact bit 1 on PRCC 5.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>