| commit | 84b919fdb8559a8cd5432d8fa0002219df59cb32 | [log] [tgz] |
|---|---|---|
| author | Stephen Boyd <sboyd@codeaurora.org> | Thu Jan 29 15:38:12 2015 -0800 |
| committer | Michael Turquette <mturquette@linaro.org> | Wed Feb 25 12:08:39 2015 -0800 |
| tree | 807e1a1081c4bc56544cbf7dfc6fe4a3e3c6db9b | |
| parent | 7dd47b8ef54c301ecde58cecf2f3e29ff3f48d4a [diff] |
clk: qcom: lcc-msm8960: Fix PLL rate detection regmap_read() returns 0 on success, not the value of the register that is read. Fix it so we properly detect the frequency plan. Fixes: b82875ee07e5 "clk: qcom: Add MSM8960/APQ8064 LPASS clock controller (LCC) driver" Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>