drm/nouveau/fb: merge fb/vram and port to subdev interfaces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 689d3e7..4aea1c4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -48,21 +48,21 @@
static void
nv10_mem_update_tile_region(struct drm_device *dev,
- struct nouveau_tile_reg *tile, uint32_t addr,
+ struct nouveau_tile_reg *tilereg, uint32_t addr,
uint32_t size, uint32_t pitch, uint32_t flags)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
- int i = tile - dev_priv->tile.reg, j;
+ int i = tilereg - dev_priv->tile.reg, j;
+ struct nouveau_fb_tile *tile = nvfb_tile(dev, i);
unsigned long save;
- nouveau_fence_unref(&tile->fence);
+ nouveau_fence_unref(&tilereg->fence);
if (tile->pitch)
- pfb->free_tile_region(dev, i);
+ nvfb_tile_fini(dev, i);
if (pitch)
- pfb->init_tile_region(dev, i, addr, size, pitch, flags);
+ nvfb_tile_init(dev, i, addr, size, pitch, flags);
spin_lock_irqsave(&dev_priv->context_switch_lock, save);
nv_wr32(dev, NV03_PFIFO_CACHES, 0);
@@ -70,7 +70,7 @@
nouveau_wait_for_idle(dev);
- pfb->set_tile_region(dev, i);
+ nvfb_tile_prog(dev, i);
for (j = 0; j < NVOBJ_ENGINE_NR; j++) {
if (dev_priv->eng[j] && dev_priv->eng[j]->set_tile_region)
dev_priv->eng[j]->set_tile_region(dev, i);
@@ -122,19 +122,17 @@
nv10_mem_set_tiling(struct drm_device *dev, uint32_t addr, uint32_t size,
uint32_t pitch, uint32_t flags)
{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
struct nouveau_tile_reg *tile, *found = NULL;
int i;
- for (i = 0; i < pfb->num_tiles; i++) {
+ for (i = 0; i < nvfb_tile_nr(dev); i++) {
tile = nv10_mem_get_tile_region(dev, i);
if (pitch && !found) {
found = tile;
continue;
- } else if (tile && tile->pitch) {
+ } else if (tile && nvfb_tile(dev, i)->pitch) {
/* Kill an unused tile region. */
nv10_mem_update_tile_region(dev, tile, 0, 0, 0, 0);
}
@@ -174,38 +172,11 @@
nouveau_sgdma_takedown(dev);
}
-bool
-nouveau_mem_flags_valid(struct drm_device *dev, u32 tile_flags)
-{
- if (!(tile_flags & NOUVEAU_GEM_TILE_LAYOUT_MASK))
- return true;
-
- return false;
-}
-
-static const struct vram_types {
- int value;
- const char *name;
-} vram_type_map[] = {
- { NV_MEM_TYPE_STOLEN , "stolen system memory" },
- { NV_MEM_TYPE_SGRAM , "SGRAM" },
- { NV_MEM_TYPE_SDRAM , "SDRAM" },
- { NV_MEM_TYPE_DDR1 , "DDR1" },
- { NV_MEM_TYPE_DDR2 , "DDR2" },
- { NV_MEM_TYPE_DDR3 , "DDR3" },
- { NV_MEM_TYPE_GDDR2 , "GDDR2" },
- { NV_MEM_TYPE_GDDR3 , "GDDR3" },
- { NV_MEM_TYPE_GDDR4 , "GDDR4" },
- { NV_MEM_TYPE_GDDR5 , "GDDR5" },
- { NV_MEM_TYPE_UNKNOWN, "unknown type" }
-};
-
int
nouveau_mem_vram_init(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct ttm_bo_device *bdev = &dev_priv->ttm.bdev;
- const struct vram_types *vram_type;
int ret, dma_bits;
dma_bits = 32;
@@ -243,27 +214,7 @@
return ret;
}
- vram_type = vram_type_map;
- while (vram_type->value != NV_MEM_TYPE_UNKNOWN) {
- if (nouveau_vram_type) {
- if (!strcasecmp(nouveau_vram_type, vram_type->name))
- break;
- dev_priv->vram_type = vram_type->value;
- } else {
- if (vram_type->value == dev_priv->vram_type)
- break;
- }
- vram_type++;
- }
-
- NV_INFO(dev, "Detected %dMiB VRAM (%s)\n",
- (int)(dev_priv->vram_size >> 20), vram_type->name);
- if (dev_priv->vram_sys_base) {
- NV_INFO(dev, "Stolen system memory at: 0x%010llx\n",
- dev_priv->vram_sys_base);
- }
-
- dev_priv->fb_available_size = dev_priv->vram_size;
+ dev_priv->fb_available_size = nvfb_vram_size(dev);
dev_priv->fb_mappable_pages = dev_priv->fb_available_size;
if (dev_priv->fb_mappable_pages > pci_resource_len(dev->pdev, 1))
dev_priv->fb_mappable_pages = pci_resource_len(dev->pdev, 1);
@@ -364,7 +315,6 @@
struct nouveau_pm_memtiming *boot,
struct nouveau_pm_memtiming *t)
{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
struct bit_entry P;
uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tmp7_3;
@@ -418,7 +368,7 @@
t->reg[7] = 0x4000202 | (e->tCL - 1) << 16;
/* XXX: P.version == 1 only has DDR2 and GDDR3? */
- if (dev_priv->vram_type == NV_MEM_TYPE_DDR2) {
+ if (nvfb_vram_type(dev) == NV_MEM_TYPE_DDR2) {
t->reg[5] |= (e->tCL + 3) << 8;
t->reg[6] |= (t->tCWL - 2) << 8;
t->reg[8] |= (e->tCL - 4);
@@ -711,7 +661,7 @@
break;
}
- switch (dev_priv->vram_type * !ret) {
+ switch (nvfb_vram_type(dev) * !ret) {
case NV_MEM_TYPE_GDDR3:
ret = nouveau_mem_gddr3_mr(dev, freq, e, len, boot, t);
break;
@@ -738,7 +688,7 @@
else
dll_off = !!(ramcfg[2] & 0x40);
- switch (dev_priv->vram_type) {
+ switch (nvfb_vram_type(dev)) {
case NV_MEM_TYPE_GDDR3:
t->mr[1] &= ~0x00000040;
t->mr[1] |= 0x00000040 * dll_off;
@@ -804,7 +754,7 @@
t->odt = 0;
t->drive_strength = 0;
- switch (dev_priv->vram_type) {
+ switch (nvfb_vram_type(dev)) {
case NV_MEM_TYPE_DDR3:
t->odt |= (t->mr[1] & 0x200) >> 7;
case NV_MEM_TYPE_DDR2:
@@ -831,7 +781,7 @@
u32 mr[3] = { info->mr[0], info->mr[1], info->mr[2] };
u32 mr1_dlloff;
- switch (dev_priv->vram_type) {
+ switch (nvfb_vram_type(dev_priv->dev)) {
case NV_MEM_TYPE_DDR2:
tDLLK = 2000;
mr1_dlloff = 0x00000001;
@@ -852,7 +802,7 @@
}
/* fetch current MRs */
- switch (dev_priv->vram_type) {
+ switch (nvfb_vram_type(dev_priv->dev)) {
case NV_MEM_TYPE_GDDR3:
case NV_MEM_TYPE_DDR3:
mr[2] = exec->mrg(exec, 2);
@@ -919,7 +869,7 @@
exec->mrs (exec, 0, info->mr[0] | 0x00000000);
exec->wait(exec, tMRD);
exec->wait(exec, tDLLK);
- if (dev_priv->vram_type == NV_MEM_TYPE_GDDR3)
+ if (nvfb_vram_type(dev_priv->dev) == NV_MEM_TYPE_GDDR3)
exec->precharge(exec);
}
@@ -982,11 +932,10 @@
struct ttm_mem_reg *mem)
{
struct drm_nouveau_private *dev_priv = nouveau_bdev(man->bdev);
- struct nouveau_vram_engine *vram = &dev_priv->engine.vram;
struct drm_device *dev = dev_priv->dev;
nouveau_mem_node_cleanup(mem->mm_node);
- vram->put(dev, (struct nouveau_mem **)&mem->mm_node);
+ nvfb_vram_put(dev, (struct nouveau_mem **)&mem->mm_node);
}
static int
@@ -996,7 +945,6 @@
struct ttm_mem_reg *mem)
{
struct drm_nouveau_private *dev_priv = nouveau_bdev(man->bdev);
- struct nouveau_vram_engine *vram = &dev_priv->engine.vram;
struct drm_device *dev = dev_priv->dev;
struct nouveau_bo *nvbo = nouveau_bo(bo);
struct nouveau_mem *node;
@@ -1006,7 +954,7 @@
if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG)
size_nc = 1 << nvbo->page_shift;
- ret = vram->get(dev, mem->num_pages << PAGE_SHIFT,
+ ret = nvfb_vram_get(dev, mem->num_pages << PAGE_SHIFT,
mem->page_alignment << PAGE_SHIFT, size_nc,
(nvbo->tile_flags >> 8) & 0x3ff, &node);
if (ret) {