| commit | 96120db99f56528a4a7ab32ba13c77d1e4d86aef | [log] [tgz] |
|---|---|---|
| author | Clément Péron <peron.clem@gmail.com> | Tue Oct 09 13:28:37 2018 +0200 |
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | Sat Dec 21 10:41:13 2019 +0100 |
| tree | b7bab01cb592cd369ac8778caa473a48882d5c38 | |
| parent | 4aec7a73e2d2c376e53c9314598243b5c49300a7 [diff] |
ARM: debug: enable UART1 for socfpga Cyclone5 [ Upstream commit f6628486c8489e91c513b62608f89ccdb745600d ] Cyclone5 and Arria10 doesn't have the same memory map for UART1. Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>