tree e60029ca0b888b1f01a049d9e512ef524b2279e3
parent fa5cecd111d235819a1d807d43216ae459a0dd6f
author Stephane Eranian <eranian@hpl.hp.com> 1165454042 +0100
committer Andi Kleen <andi@basil.nowhere.org> 1165454042 +0100

[PATCH] x86-64: x86-64 add Intel Core related PMU MSRs definitions

Add o the x86-64 tree a bunch of MSRs related to performance
monitoring for the processors based on Intel Core microarchitecture.
It also adds some architectural MSRs for PEBS. A similar patch for i386 will
follow.

changelog:
	- add Intel Precise-Event Based sampling (PEBS) related MSR
	- add Intel Data Save (DS) Area related MSR
	- add Intel Core microarchitecure performance counter MSRs

Signed-off-by: stephane eranian <eranian@hpl.hp.com>
Signed-off-by: Andi Kleen <ak@suse.de>