tg3: Don't access phy test ctrl reg for 5717+
The phy test register location has been repurposed for 5717+ devices.
This patch changes the code to avoid this location for these devices.
Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 7892b00..5d155c5 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -6929,9 +6929,13 @@
val = GRC_MISC_CFG_CORECLK_RESET;
if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
- if (tr32(0x7e2c) == 0x60) {
- tw32(0x7e2c, 0x20);
- }
+ /* Force PCIe 1.0a mode */
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
+ !(tp->tg3_flags3 & TG3_FLG3_5717_PLUS) &&
+ tr32(TG3_PCIE_PHY_TSTCTL) ==
+ (TG3_PCIE_PHY_TSTCTL_PCIE10 | TG3_PCIE_PHY_TSTCTL_PSCRAM))
+ tw32(TG3_PCIE_PHY_TSTCTL, TG3_PCIE_PHY_TSTCTL_PSCRAM);
+
if (tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
tw32(GRC_MISC_CFG, (1 << 29));
val |= (1 << 29);