tree 8be5534f24ac4b930b1b0b3b43d5ccbf72aa4fc4
parent 6269f2584a359766f53005c676daff8aee60cbed
author Timur Tabi <timur@freescale.com> 1343076212 -0500
committer Kumar Gala <galak@kernel.crashing.org> 1343327165 -0500

powerpc/85xx: p1022ds: fix DIU/LBC switching with NAND enabled

In order for indirect mode on the PIXIS to work properly, both chip selects
need to be set to GPCM mode, otherwise writes to the chip select base
addresses will not actually post to the local bus -- they'll go to the
NAND controller instead.  Therefore, we need to set BR0 and BR1 to GPCM
mode before switching to indirect mode.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>