| commit | 8986d2f50e1a9ba63f64ccbf59181886aa7898c3 | [log] [tgz] |
|---|---|---|
| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | Tue Jun 24 23:26:38 2008 +0900 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Thu Jul 03 19:14:27 2008 +0100 |
| tree | 0fde3d8ff52cb4cac35348c2464939fc7b6fc9e9 | |
| parent | 7e3297dc280f88ec0c6619a895f3d449776f952e [diff] |
[MIPS] cevt-txx9: Reset timer counter on initialization The txx9_tmr_init() will not clear a timer counter register in a certain case. The counter register is cleared on 1->0 transition of TCE bit if CRE=1. So just clearing the TCE bit is not enough. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>