| commit | 898c914a0871ea7e5557b77156d4358c0f15d98a | [log] [tgz] |
|---|---|---|
| author | Felix Fietkau <nbd@openwrt.org> | Tue Oct 12 14:02:53 2010 +0200 |
| committer | John W. Linville <linville@tuxdriver.com> | Fri Oct 15 15:48:44 2010 -0400 |
| tree | 7c3fb4a99f3a0f6154b7f52a20f21b3ea9e61597 | |
| parent | 3be63ff0ae196b371728ba8fc8aca12eafcae218 [diff] |
ath9k: do not track cycle counter updates in powersave mode While the chip is in powersave mode, the cycle counter updates do not contain useful values. While the chip is in full sleep, the rx_clear signal stays high, indicating a busy medium. To ensure sane values, update cycle counters before going into powersave, and clear them right after switching back to awake. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>