tree 954a8753ce27fbd5ee9b0cc9fe4adeaa4d9d15bc
parent c1c9f2cced4e3ba22b3fc25603dd3bd2ec7dc173
author Alexandru M Stan <amstan@chromium.org> 1417051827 -0800
committer Heiko Stuebner <heiko@sntech.de> 1417131864 +0100

clk: rockchip: Add support for the mmc clock phases using the framework

This patch adds the 2 physical clocks for the mmc (drive and sample). They're
mostly there for the phase properties, but they also show the true clock
(by dividing by RK3288_MMC_CLKGEN_DIV).

The drive and sample phases are generated by dividing an upstream parent clock
by 2, this allows us to adjust the phase by 90 deg.

There's also an option to have up to 255 delay elements (40-80 picoseconds long).
This driver uses those elements (under the assumption that they're 60 ps long)
to generate approximate 22.5 degrees options. 67.5 (22.5*3) might be as high as
90 deg if the delay elements are as big as 80 ps, so a finer division (smaller
than 22.5) was not picked because the phase might not be monotonic anymore.

Suggested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>