ARM: dts: Set i2c7 clock at 400kHz for exynos based Peach boards
The downstream ChromeOS 3.8 kernel sets the clock frequency
for the I2C bus 7 at 400kHz. Do the same change in mainline.
Suggested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 17537f0..88b3544 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -487,6 +487,7 @@
&hsi2c_7 {
status = "okay";
+ clock-frequency = <400000>;
max98091: codec@10 {
compatible = "maxim,max98091";