| commit | 6545eae3d7a1b6dc2edb8ede9107998aee1207ef | [log] [tgz] |
|---|---|---|
| author | Marc Zyngier <marc.zyngier@arm.com> | Thu Aug 29 11:08:23 2013 +0100 |
| committer | Gleb Natapov <gleb@redhat.com> | Fri Aug 30 16:12:16 2013 +0300 |
| tree | c7d47b4095192db5a10f4b3c91937d42c89c88f6 | |
| parent | 986af8e0789a41ac4844e6eefed4a33e86524918 [diff] |
ARM: KVM: vgic: fix GICD_ICFGRn access All the code in handle_mmio_cfg_reg() assumes the offset has been shifted right to accomodate for the 2:1 bit compression, but this is only done when getting the register address. Shift the offset early so the code works mostly unchanged. Reported-by: Zhaobo (Bob, ERC) <zhaobo@huawei.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>