| commit | 8693607ae4efe065aa65e26fd6dda8aab7e18ea7 | [log] [tgz] |
|---|---|---|
| author | Ben Widawsky <ben@bwidawsk.net> | Fri Sep 21 16:54:14 2012 -0700 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Sun Nov 11 23:51:09 2012 +0100 |
| tree | 90d4af6ea6cc4d1a6777c07f20b2a4e968bad633 | |
| parent | 17f10fdc010254b8e9c0f1779abdaaee4757cabf [diff] |
drm/i915: No LLC_MLC for HSW. The mid-level cache or as it's more commonly referred to now as L3, is not setup this way on HSW. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>