| commit | 8f670bb15a69e1186098454beb1b43dc1d923a24 | [log] [tgz] |
|---|---|---|
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | Wed Mar 05 13:05:47 2014 +0200 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Wed Mar 05 21:30:44 2014 +0100 |
| tree | 175f076b4559206efa56e321ca74c165950f0ab7 | |
| parent | 2adb6db8d9fb0f94173a4cba6e1dcb8585f1a928 [diff] |
drm/i915: Unify CHICKEN_PIPESL_1 register definitions We have two names for the same register CHICKEN_PIPESL_1 and HSW_PIPE_SLICE_CHICKEN_1. Unify it to just one. Also rename the FBCQ disable bit to resemble the name we've given to a similar bit on earlier platforms. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>